VLSI Signal Processing Systems Laboratory (VSPS Lab) was setup in the Department of Electrical Engineering, Yuan Ze University (YZU), in 2010. This lab located in Room 70613, 7th Building at YZU is directed by Dr. Cheng-Hung (Dixson) Lin. Currently, Lab members include 11 master students and 27 undergraduate students. The main hardware equipments are workstations, personal computers, laptop computers, FPGA development platforms. The software tools are programming languages (C, MATLAB, Python, Verilog, etc.) and EDA tools (Cadence, Avant !, Synopsys, Mentor Graphic, etc.).

Because of a widespread mobile/portable usage and advances in digital signal processing, there is a constant need for designing systems with vision and prospect of energy-efficient and area-efficient VLSI designs. The aim of our Lab is to develop the theoretical and practical aspects of digital signal processing in new and emerging technologies. We do academic/industrial research on the design and implementation of signal processing systems with low-power, high-speed, and low-area VLSI circuits. A wide range of the research topics is covered within fields of algorithms and architectures, system designs and implementations. Seizing the advantage of IC design and production in Taiwan, every graduate in our Lab is requested to have ability to design IC independently. Thus, the efficient algorithms and VLSI architecture designs are targeted to verify the correctness of theory by using ASIC and FPGA. Nowadays, our Lab can be divided into groups carry on the following research projects separately: (1) developing the prospective forward error correction codec (e.g. Polar codes, LDPC codes and Turbo codes) for communication/storage systems, and (2) developing the prospective hardware accelerator for artificial intelligence in medicine.

(Update: 2022/09/01)